Published
ISO/TR 24119:2015 illustrates and explains principles of fault masking in applications where multiple interlocking devices with potential free contacts (B1 to Bn) are connected in series to one logic unit (K) which does the diagnostics (see Figures 1 to 7). It further provides a guide how to estimate the probability of fault masking and the maximum DC for the involved interlocking devices. This Technical Report only covers interlocking devices in which both channels are physical serial connections.
PUBLISHED
ISO/TR 24119:2015
60.60
Standard published
Nov 13, 2015
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